A number of memory devices, such as flash memory devices, use analog memory cells to store data. Each memory cell stores an analog value, also referred to as a storage value, such as an electrical charge or voltage. The storage value represents the information stored in the cell. In flash memory devices, for example, each analog memory cell typically stores a certain voltage. The range of possible analog values for each cell is typically divided into threshold regions, with each region corresponding to one or more data bit values. Data is written to an analog memory cell by writing a nominal analog value that corresponds to the desired one or more bits.
The analog values stored in memory cells are often distorted. The distortions are typically due to, for example, back pattern dependency (BPD), noise and inter-cell interference (ICI).
A number of techniques have been proposed or suggested for mitigating the effect of ICI by reducing the capacitive coupling between cells. While there are available methods to reduce the effect of ICI and other noise, it is important that such ICI and noise mitigation techniques do not unnecessarily impair the write-read speeds for flash control systems. Thus, many effective signal processing and error correction coding techniques are avoided that would introduce significant inherent processing delays. Foregoing such complex signal processing techniques, however, reduces the ability of a flash control system to maintain sufficient detection and decoding accuracy as flash device geometries scale down.
The smallest writable data unit in a flash memory device is referred to as a page. A page can comprise several codewords of a read channel error correction code (ECC), which is the smallest readable data unit. Depending on the mapping of page bits into memory cell voltages, there is usually a significant statistical correlation among errors in pages mapped to the same wordline. Thus, it has been recognized that there are benefits to coding across multiple pages. In order to maintain high write and read speeds in flash memory devices, however, pages are typically written and decoded on-the-fly, independently from other pages. A need therefore exists for an ECC design that allows a page to be decoded on-the-fly in a normal mode of operation, while also supporting decoding of a wordline comprised of multiple pages if a failure occurs.